Universal Serial Bus 3.0 Research Paper Example | Topics and Well Written Essays - 1000 words

Universal Serial Bus 3.0 - Research Paper ExampleThe invention of USB 3.0, supporting massive data transfer with super-fast speeds, overcomes these problems. (Perenson, 2010) With a blazing data transfer speed of over 5 gigabits per second will certainly add value towards a better life. Apart from the blazing speed, USB 3.0 is averse compatible as well, as it set up be used with traditional USB 2.0 ports. For achieving USB 3.0 compliant speed, a USB 3.0 supported tress and USB 3.0 compatible cable is required. However, the cable can be used with USB 2.0 compatible devices with no gain in data transfer speeds. (Perenson, 2010) The technological improvements of the USB 3.0 are identical to PCI Express and the backward compatibility support is achieved by an intelligent design along with a dual bus. For USB 3.0, the design incorporates five lines i.e. 4 data lines and one basis wire for USB 3.0 singles. Apart from having identical ground and power wires, both of USB technology versi ons are dissimilar (Perenson, 2010). USB 3.0 Architecture Figure 1.1 Source (Govindaraman, 2010) (Govindaraman, 2010) The USB 3.0 architecture is inspired by the PCI express architecture and the ISO model. The architecture has physical layer tagged as (PHY), protocol layer and link layer, as illustrated in Fig 1.1. The PHY incorporates the connectivity between the device and the host or a hub device. same to the PCI express architecture physical layer, USB 3.0 incorporates encoding and decoding, data scrambling and descrambling, serialization and deserialization singularitys (Govindaraman, 2010). The responsibility of the link layer incorporates stable data integrity for link partners by deploying computer error detection algorithms (Govindaraman, 2010). Likewise, piece of grounds are constructed in the link layer and link commands are allotted. Moreover, the protocol layer is responsible for managing end to end flow of data via device and a host (Govindaraman, 2010). Similar t o the USB 2.0 architecture, the super speed bus is responsible for carrying address, status, data and control information. The four packet types are identical to the USB 3.0 i.e. the transaction packet (TP) and the data packet (DP). However, two other packets named as Isochronous Timestamp Packet (ITP) and Link commission Packet (LMP) is new in the USB 3.0 architecture (Govindaraman, 2010). USB 3.0 Power Management The power management of USB 3.0 incorporates enhanced power management functions for addressing the requirements of battery powered devices and portable applications. Moreover, USB 3.0 has also introduced function suspend feature that activates power management for mortal functions associated with a composite device. This feature provides flexibility for eliminating other functions associated with the device however, other functions remain operational. Furthermore, power saving is accomplished by a new feature called as latency tolerance messaging (LTM) architecture tha t is integrated within the USB 3.0. Likewise, the device may send information to the host for the tolerance of utmost appease from the time it sends the status ERDY (Govindaraman, 2010). The table illustrated in Fig 1.2, demonstrates comparison of different technologies. The conclusion highlights that USB 3.0 is 10 times faster than Fast Gigabit Ethernet, however, Gigabit Ethernet incorporates more power and the maximum cable length is also greater than USB 3.0. FireWire-b Gigabit Ethernet